LT1963 [Linear Systems]
1.5A, Low Noise, Fast Transient Response LDO Regulators; 1.5A ，低噪声，快速瞬态响应LDO稳压器
| 型号： | LT1963 |
| 厂家： | 
Linear Systems |
| 描述： | 1.5A, Low Noise, Fast Transient Response LDO Regulators |
| 文件： | 总16页 (文件大小：242K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1963 Series
1.5A, Low Noise,
Fast Transient Response
LDO Regulators
U
FEATURES
DESCRIPTIO
The LT®1963 series are low dropout regulators optimized
for fast transient response. The devices are capable of
supplying 1.5A of output current with a dropout voltage of
340mV. Operating quiescent current is 1mA, dropping to
<1µA in shutdown. Quiescent current is well controlled; it
does not rise in dropout as it does with many other
regulators. In addition to fast transient response, the
LT1963 regulators have very low output noise which
makes them ideal for sensitive RF supply applications.
■
Optimized for Fast Transient Response
■
Output Current: 1.5A
■
Dropout Voltage: 340mV
■
Low Noise: 40µVRMS (10Hz to 100kHz)
■
■
■
■
■
■
■
■
■
■
1mA Quiescent Current
No Protection Diodes Needed
Controlled Quiescent Current in Dropout
Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V
Adjustable Output from 1.21V to 20V
<1µA Quiescent Current in Shutdown
Stable with 10µF Output Capacitor
Reverse Battery Protection
Output voltage range is from 1.21V to 20V. The LT1963
regulators are stable with output capacitors as low as
10µF.Internalprotectioncircuitryincludesreversebattery
protection, current limiting, thermal limiting and reverse
current protection. The devices are available in fixed
output voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an
adjustable device with a 1.21V reference voltage. The
LT1963 regulators are available in 5-lead TO-220, DD,
3-lead SOT-223 and 8-lead SO packages.
No Reverse Current
Thermal Limiting
U
APPLICATIO S
■
3.3V to 2.5V Logic Power Supplies
Post Regulator for Switching Supplies
■
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATION
Dropout Voltage
400
3.3V to 2.5V Regulator
350
300
250
200
150
100
50
2.5V
1.5A
IN
OUT
LT1963-2.5
+
+
V
> 3V
10µF
10µF
IN
SHDN SENSE
GND
1963 TA01
0
0.8 1.0
OUTPUT CURRENT (A)
0
0.2 0.4 0.6
1.2 1.4 1.6
1963 TA02
1963fa
1
LT1963 Series
W W
U W
ABSOLUTE AXI U RATI GS (Note 1)
SHDN Pin Voltage................................................. ±20V
Output Short-Circuit Duration ......................... Indefinite
Operating Junction Temperature Range –45°C to 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
IN Pin Voltage........................................................ ±20V
OUT Pin Voltage .................................................... ±20V
Input to Output Differential Voltage (Note 2) ......... ±20V
SENSE Pin Voltage ............................................... ±20V
ADJ Pin Voltage ...................................................... ±7V
U W
U
PACKAGE/ORDER I FOR ATIO
FRONT VIEW
FRONT VIEW
ORDER PART
NUMBER
ORDER PART
5
4
3
2
1
SENSE/ADJ*
OUT
5
4
3
2
1
SENSE/ADJ*
OUT
NUMBER
TAB IS
GND
GND
GND
LT1963ET
LT1963EQ
IN
IN
LT1963ET-1.5
LT1963ET-1.8
LT1963ET-2.5
LT1963ET-3.3
LT1963EQ-1.5
LT1963EQ-1.8
LT1963EQ-2.5
LT1963EQ-3.3
SHDN
SHDN
TAB IS
GND
T PACKAGE
5-LEAD PLASTIC TO-220
Q PACKAGE
5-LEAD PLASTIC DD
*PIN 5 = SENSE FOR LT1963-1.8/LT1963-2.5/LT1963-3.3
= ADJ FOR LT1963
*PIN 5 = SENSE FOR LT1963-1.8/LT1963-2.5/LT1963-3.3
= ADJ FOR LT1963
T
JMAX = 150°C, θJA = 50°C/ W
TJMAX = 150°C, θJA = 30°C/ W
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
LT1963EST-1.5
LT1963EST-1.8
LT1963EST-2.5
LT1963EST-3.3
LT1963ES8
FRONT VIEW
OUT
SENSE/ADJ*
GND
1
2
3
4
8
7
6
5
IN
LT1963ES8-1.5
LT1963ES8-1.8
LT1963ES8-2.5
LT1963ES8-3.3
3
2
1
OUT
GND
IN
GND
GND
SHDN
TAB IS
GND
NC
S8 PACKAGE
8-LEAD PLASTIC SO
ST PACKAGE
3-LEAD PLASTIC SOT-223
ST PART
MARKING
S8 PART
MARKING
*PIN 2 = SENSE FOR LT1963-1.8/LT1963-2.5/LT1963-3.3
= ADJ FOR LT1963
TJMAX = 150°C, θJA = 50°C/ W
TJMAX = 150°C, θJA = 70°C/ W
1963
196315
196318
196325
196333
196315
196318
196325
196333
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 3)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Input Voltage (Notes 4,12)
I
I
= 0.5A
= 1.5A
1.9
2.1
V
V
LOAD
LOAD
●
●
●
2.5
Regulated Output Voltage (Note 5)
LT1963-1.5
V
= 2.21V, I
= 1mA
1.477
1.447
1.500
1.500
1.523
1.545
V
V
IN
LOAD
2.5V < V < 20V, 1mA < I
< 1.5A
< 1.5A
IN
LOAD
LOAD
LT1963-1.8
V
IN
= 2.3V, I
= 1mA
LOAD
1.773
1.737
1.800
1.800
1.827
1.854
V
V
2.8V < V < 20V, 1mA < I
IN
1963fa
2
LT1963 Series
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. (Note 2)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
LT1963-2.5
V
= 3V, I
= 1mA
LOAD
2.462
2.412
2.500
2.500
2.538
2.575
V
V
IN
3.5V < V < 20V, 1mA < I
< 1.5A
< 1.5A
< 1.5A
●
●
●
IN
LOAD
LT1963-3.3
LT1963
V
= 3.8V, I
= 1mA
3.250
3.200
3.300
3.300
3.350
3.400
V
V
IN
LOAD
4.3V < V < 20V, 1mA < I
IN
LOAD
ADJ Pin Voltage
(Notes 4, 5)
V
= 2.21V, I
= 1mA
1.192
1.174
1.210
1.210
1.228
1.246
V
V
IN
LOAD
2.5V < V < 20V, 1mA < I
IN
LOAD
Line Regulation
LT1963-1.5
LT1963-1.8
LT1963-2.5
LT1963-3.3
∆V = 2.21V to 20V, I
= 1mA
●
●
●
●
●
2.0
2.5
3.0
3.5
1.5
10
10
10
10
10
mV
mV
mV
mV
mV
IN
LOAD
∆V = 2.3V to 20V, I
= 1mA
IN
IN
LOAD
LOAD
LOAD
∆V = 3V to 20V, I
= 1mA
= 1mA
= 1mA
∆V = 3.8V to 20V, I
IN
LT1963 (Note 4) ∆V = 2.21V to 20V, I
IN
LOAD
Load Regulation
LT1963-1.5
LT1963-1.8
LT1963-2.5
LT1963-3.3
V
V
= 2.5V, ∆I
= 2.5V, ∆I
= 1mA to 1.5A
= 1mA to 1.5A
2
9
mV
mV
IN
IN
LOAD
LOAD
●
●
●
●
●
●
●
●
●
18
V
V
= 2.8V, ∆I
= 2.8V, ∆I
= 1mA to 1.5A
= 1mA to 1.5A
2
10
20
mV
mV
IN
IN
LOAD
LOAD
V
V
= 3.5V, ∆I
= 3.5V, ∆I
= 1mA to 1.5A
= 1mA to 1.5A
2.5
3
15
30
mV
mV
IN
IN
LOAD
LOAD
V
V
= 4.3V, ∆I
= 4.3V, ∆I
= 1mA to 1.5A
= 1mA to 1.5A
20
35
mV
mV
IN
IN
LOAD
LOAD
LT1963 (Note 4) V = 2.5V, ∆I
= 1mA to 1.5A
= 1mA to 1.5A
2
8
15
mV
mV
IN
IN
LOAD
LOAD
V
= 2.5V, ∆I
Dropout Voltage
I
I
= 1mA
= 1mA
0.02
0.10
0.19
0.34
0.06
0.10
V
V
LOAD
LOAD
V
= V
IN
OUT(NOMINAL)
(Notes 6, 7, 12)
I
I
= 100mA
= 100mA
0.17
0.22
V
V
LOAD
LOAD
I
I
= 500mA
= 500mA
0.27
0.35
V
V
LOAD
LOAD
I
I
= 1.5A
= 1.5A
0.45
0.55
V
V
LOAD
LOAD
GND Pin Current
IN
(Notes 6, 8)
I
I
I
I
I
= 0mA
●
●
●
●
●
1.0
1.1
3.8
15
1.5
1.6
5.5
25
mA
mA
mA
mA
mA
LOAD
LOAD
LOAD
LOAD
LOAD
V
= V
+ 1V
OUT(NOMINAL)
= 1mA
= 100mA
= 500mA
= 1.5A
80
120
Output Voltage Noise
ADJ Pin Bias Current
Shutdown Threshold
C
= 10µF, I
= 1.5A, BW = 10Hz to 100kHz
40
3
µV
RMS
OUT
LOAD
(Notes 4, 9)
10
2
µA
V
V
= Off to On
= On to Off
●
●
0.90
0.75
V
V
OUT
OUT
0.25
SHDN Pin Current
(Note 10)
V
V
= 0V
= 20V
0.01
3
1
30
µA
µA
SHDN
SHDN
Quiescent Current in Shutdown
Ripple Rejection
V
V
= 6V, V
= 0V
SHDN
0.01
63
1
µA
IN
IN
– V
= 1.5V (Avg), V
= 0.5V ,
P-P
55
dB
OUT
= 120Hz, I
RIPPLE
f
= 0.75A
RIPPLE
LOAD
Current Limit
V
V
= 7V, V
= 0V
2
A
A
IN
IN
OUT
= V
+ 1V, ∆V
= –0.1V
OUT
●
1.6
OUT(NOMINAL)
Input Reverse Leakage Current (Note 13) Q, T, S8 Packages V = –20V, V
= 0V
OUT
●
●
1
2
mA
mA
IN
V
OUT
ST Package
= –20V, V
= 0V
IN
Reverse Output Current (Note 11)
LT1963-1.5
LT1963-1.8
LT1963-2.5
LT1963-3.3
V
V
V
V
= 1.5V, V < 1.5V
600
600
600
600
300
1200
1200
1200
1200
600
µA
µA
µA
µA
µA
OUT
OUT
OUT
OUT
OUT
IN
= 1.8V, V < 1.8V
IN
= 2.5V, V < 2.5V
IN
= 3.3V, V < 3.3V
IN
LT1963 (Note 4) V
= 1.21V, V < 1.21V
IN
1963fa
3
LT1963 Series
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
external resistor divider (two 4.12k resistors) for an output voltage of
2.4V. The external resistor divider will add a 300µA DC load on the output.
of a device may be impaired.
Note 2: Absolute maximum input to output differential voltage can not be
achieved with all combinations of rated IN pin and OUT pin voltages. With
the IN pin at 20V, the OUT pin may not be pulled below 0V. The total
measured voltage from IN to OUT can not exceed ±20V.
Note 7: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V – V
.
IN
DROPOUT
Note 8: GND pin current is tested with V = V
+ 1V and a
IN
OUT(NOMINAL)
Note 3: The LT1963 regulators are tested and specified under pulse load
current source load. The GND pin current will decrease at higher input
voltages.
conditions such that T ≈ T . The LT1963 is 100% tested at
J
A
T = 25°C. Performance at –40°C and 125°C is assured by design,
A
Note 9: ADJ pin bias current flows into the ADJ pin.
Note 10: SHDN pin current flows into the SHDN pin.
Note 11: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 12. For the LT1963, LT1963-1.5 and LT1963-1.8 dropout voltage will
be limited by the minimum input voltage specification under some output
voltage/load conditions.
Note 13. For the ST package, the input reverse leakage current increases
due to the additional reverse leakage current for the SHDN pin, which is
tied internally to the IN pin.
characterization and correlation with statistical process controls.
Note 4: The LT1963 (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 6: To satisfy requirements for minimum input voltage, the LT1963
(adjustable version) is tested and specified for these conditions with an
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Typical Dropout Voltage
Guaranteed Dropout Voltage
Dropout Voltage
500
450
400
350
300
250
200
150
100
50
500
450
400
350
300
250
200
150
100
50
600
500
400
300
200
100
0
TEST POINTS
T
J
≤ 125°C
T
= 125°C
J
I
= 1.5A
L
T
≤ 25°C
J
T
= 25°C
I
L
= 0.5A
J
I
L
= 100mA
I
L
= 1mA
0
0
0
1.4
0
0.8
1.2 1.4
0.2 0.4 0.6 0.8 1.0 1.2
OUTPUT CURRENT (A)
1.6
0.2 0.4 0.6
1.0
1.6
–50
0
25
50
75 100 125
–25
OUTPUT CURRENT (A)
TEMPERATURE (°C)
1963 • G01
1963 • G02
1963 G03
Quiescent Current
LT1963-1.8 Output Voltage
LT1963-2.5 Output Voltage
1.84
1.83
1.82
1.81
1.80
1.79
1.78
1.77
1.76
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
I
L
= 1mA
I
L
= 1mA
LT1963-1.8/-2.5/-3.3
LT1963
V
= 6V
IN
L
R
= ∞, I = 0
L
V
= V
IN
SHDN
–25
0
25
50
75
125
–50
100
–25
0
25
50
75
125
–50
100
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
1963 G05
1963 G06
1963 G04
1963fa
4
LT1963 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
LT1963-1.8 Quiescent Current
LT1963-3.3 Output Voltage
LT1963 ADJ Pin Voltage
1.230
1.225
1.220
1.215
1.210
1.205
1.200
1.195
1.190
3.38
3.36
3.34
3.32
3.30
3.28
3.26
3.24
3.22
14
12
10
8
I
L
= 1mA
I
= 1mA
T
= 25°C
= ∞
SHDN
L
J
L
R
V
= V
IN
6
4
2
0
–25
0
25
50
75
125
–50
100
–25
0
25
50
75
125
–50
100
0
3
4
5
6
7
8
9
10
1
2
TEMPERATURE (°C)
TEMPERATURE (°C)
INPUT VOLTAGE (V)
1963 G08
1963 G07
1963 G09
LT1963-2.5 Quiescent Current
LT1963-3.3 Quiescent Current
LT1963 Quiescent Current
14
12
10
8
14
12
10
8
14
12
10
8
T
= 25°C
T
= 25°C
J
L
T = 25°C
J
J
L
R
= ∞
R
= ∞
R = 4.3k
L
V
= V
IN
V
= V
SHDN
V
= V
SHDN IN
SHDN
IN
6
6
6
4
4
4
2
2
2
0
0
0
0
3
4
5
6
7
8
9
10
1
2
0
3
4
5
6
7
8
9
10
10 12 14 16 18 20
INPUT VOLTAGE (V)
1
2
0
6
8
2
4
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1963 G11
1963 G10
1963 G12
LT1963-1.8 GND Pin Current
LT1963-2.5 GND Pin Current
LT1963-3.3 GND Pin Current
25
20
15
10
5
25
20
15
10
5
25
20
15
10
5
T = 25°C
T
= 25°C
SHDN
T
= 25°C
SHDN
J
J
J
V
= V
V
= V
V
= V
SHDN
IN
IN
IN
*FOR V
= 2.5V
*FOR V
= 1.18V
*FOR V
= 3.3V
OUT
OUT
OUT
R
L
= 8.33, I = 300mA*
L
R
L
= 11, I = 300mA*
L
R
L
= 6, I = 300mA*
L
R
L
= 25, I = 100mA*
L
R
L
= 33, I = 100mA*
L
R
L
= 18, I = 100mA*
L
R
2
= 180, I = 10mA*
L
L
R
= 250, I = 10mA*
L
L
R
3
= 330, I = 100mA*
L L
0
0
0
0
1
2
3
4
5
6
7
8
9
10
0
1
2
4
5
6
7
8
9
10
0
1
3
4
5
6
7
8
9 10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1963 G14
1963 G15
1963 G13
1963fa
5
LT1963 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U W
LT1963-1.8 GND Pin Current
LT1963-2.5 GND Pin Current
LT1963 GND Pin Current
100
90
80
70
60
50
40
30
20
10
0
10
8
100
90
80
70
60
50
40
30
20
10
0
T
= 25°C
SHDN
T
= 25°C
SHDN
J
V
T
= 25°C
SHDN
J
J
V
= V
V
= V
IN
= 1.8V
= V
IN
IN
= 2.5V
*FOR V
*FOR V
= 1.21V
OUT
*FOR V
OUT
OUT
R
= 1.67, I = 1.5A*
L
L
R
= 4.33, I = 300mA*
L
L
R
= 1.2, I = 1.5A*
L
6
L
4
R
= 2.5, I = 1A*
L
L
R
= 12.1, I = 100mA*
R = 1.8, I = 1A*
L L
L
L
2
R
L
= 5, I = 500mA*
L
R
L
= 3.6, I = 500mA*
L
R
= 121, I = 10mA*
L
L
0
4
0
1
2
3
5
6
7
8
9
10
4
0
1
2
3
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9 10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1963 G17
1963 G18
1963 G16
LT1963 GND Pin Current
GND Pin Current vs ILOAD
LT1963-3.3 GND Pin Current
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
IN
= V +1V
OUT (NOMINAL)
T
= 25°C
SHDN
T
= 25°C
SHDN
J
V
J
= V
V
= V
IN
= 3.3V
IN
*FOR V
*FOR V
= 1.21V
OUT
OUT
R
= 2.2, I = 1.5A*
L
L
R
= 0.81, I = 1.5A*
L
L
R
= 3.3, I = 1A*
L
L
R
L
= 1.21, I = 1A*
L
R
= 6.6, I = 500mA*
L
R
= 2.42, I = 500mA*
L
L
L
4
4
0
1
2
3
5
6
7
8
9
10
0
1
2
3
5
6
7
8
9
10
0.8
0.2 0.4 0.6
OUTPUT CURRENT (A)
0
1.0 1.2 1.4 1.6
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
1963 G20
1963 G19
1963 G21
SHDN Pin Threshold (Off-to-On)
SHDN Pin Input Current
SHDN Pin Threshold (On-to-Off)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
I
= 1mA
L
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
I
= 1.5A
L
I
= 1mA
L
50
75 100 125
–50
0
25
50
75 100 125
–50
–25
0
25
–25
8
0
2
4
6
10 12 14 16 18 20
TEMPERATURE (°C)
TEMPERATURE (°C)
SHDN PIN VOLTAGE (V)
1963 G22
1963 G23
1963 G24
1963fa
6
LT1963 Series
U W
TYPICAL PERFOR A CE CHARACTERISTICS
SHDN Pin Input Current
Current Limit
ADJ Pin Bias Current
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
7
6
5
4
3
2
1
0
3.0
2.5
2.0
1.5
1.0
0.5
0
V
SHDN
= 20V
T = 25°C
J
T = –50°C
J
T = 125°C
J
∆V
OUT
= 100mV
50
100 125
–50 –25
0
25
75
–50
0
25
50
75 100 125
–25
0
2
4
6
8
10 12 14 16 18 20
TEMPERATURE (°C)
INPUT/OUTPUT DIFFERENTIAL (V)
TEMPERATURE (°C)
1963 G25
1963 G26
1963 G27
Reverse Output Current
Current Limit
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
V
= 7V
IN
OUT
= 0V
LT1963-1.8
LT1963
LT1963-3.3
LT1963-2.5
T
= 25°C
IN
J
V
= 0V
CURRENT FLOWS INTO
OUTPUT PIN
V
OUT
V
OUT
= V
(LT1963)
ADJ
FB
= V (LT1963-1.8/-2.5/-3.3)
–50
0
25
50
75 100 125
4
–25
0
1
2
3
6
7
8
9
10
5
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
1963 G28
1963 G29
Ripple Rejection
Ripple Rejection
Reverse Output Current
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
80
76
74
72
70
68
66
V
V
V
V
V
= 0V
IN
= 1.21V (LT1963)
OUT
OUT
OUT
OUT
70
60
50
40
30
20
10
0
= 1.8V (LT1963-1.8)
= 2.5V (LT1963-2.5)
= 3.3V (LT1963-3.3)
LT1963-1.8/-2.5/-3.3
LT1963
C
= 100µF TANTALUM
+10 × 1µF CERAMIC
OUT
C
= 10µF TANTALUM
OUT
I
= 0.75A
= V
L
IN
64
I
= 0.75A
L
V
+1V + 0.5V
P-P
OUT(NOMINAL)
V
= V
+1V + 50mV
10k
RIPPLE
IN
OUT(NOMINAL)
RMS
RIPPLE AT f = 120Hz
25
TEMPERATURE (°C)
62
50
100 125
–50
0
25
50
75 100 125
–50 –25
0
75
–25
10
100
1k
100k
1M
TEMPERATURE (°C)
FREQUENCY (Hz)
1963 G31
1963 G30
1963 G32
1963fa
7
LT1963 Series
TYPICAL PERFOR A CE CHARACTERISTICS
U W
LT1963 Minimum Input Voltage
Load Regulation
Output Noise Spectral Density
3.0
2.5
2.0
1.5
1.0
0.5
0
10
5
1.0
0.1
C
L
= 10µF
OUT
=1.5A
I
I
L
= 1.5A
LT1963-1.8
LT1963
I
= 500mA
L
0
LT1963-2.5
LT1963-3.3
I
= 100mA
L
–5
–10
–15
–20
LT1963-2.5
LT1963-3.3
LT1963
V
V
= V
+1V
OUT(NOMINAL)
IN
LT1963-1.8
(LT1963-1.8/-2.5/-3.3)
= 2.7V (LT1963)
IN
L
∆I = 1mA TO 1.5A
0.01
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
10
100
1k
10k
100k
FREQUENCY (Hz)
1963 G35
1963 G33
1963 G34
RMS Output Noise vs Load
Current (10Hz to 100kHz)
LT1963-3.3 10Hz to 100kHz Output Noise
50
45
40
35
30
25
20
15
10
5
C
OUT
= 10µF
LT1963-3.3
LT1963-2.5
LT1963-1.8
LT1963
V
OUT
100µV/DIV
0
1963 G37
0.0001 0.001
0.01
0.1
1
10
C
LOAD
= 10µF
= 1.5A
1ms/DIV
OUT
I
LOAD CURRENT (A)
1063 G36
LT1963-3.3 Transient Response
LT1963-3.3 Transient Response
200
150
100
50
150
100
50
V
C
C
= 4.3V
IN
IN
= 3.3µF TANTALUM
= 10µF TANTALUM
OUT
0
0
–50
–100
–150
1.5
1.0
0.5
0
–50
–100
0.6
0.4
0.2
0
V
C
C
= 4.3V
IN
IN
= 33µF TANTALUM
= 100µF TANTALUM
OUT
+10 × 1µF CERAMIC
8
250
300
0
2
4
6
10 12 14 16 18 20
0
50 100 150 200
350 400 450 500
TIME (µs)
TIME (µs)
1963 G38
1963 G39
1963fa
8
LT1963 Series
U
U
U
PI FU CTIO S
OUT: Output. The output supplies power to the load. A
minimum output capacitor of 10µF is required to prevent
oscillations. Larger output capacitors will be
required for applications with large transient loads to limit
peak voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.
will be off when the SHDN pin is pulled low. The SHDN pin
can be driven either by 5V logic or open-collector logic
with a pull-up resistor. The pull-up resistor is required to
supply the pull-up current of the open-collector gate,
normally several microamperes, and the SHDN pin cur-
rent, typically 3µA. If unused, the SHDN pin must be
connected to VIN. The device will be in the low power
shutdown state if the SHDN pin is not connected.
SENSE: Sense. For fixed voltage versions of the LT1963
(LT1963-1.8/LT1963-2.5/LT1963-3.3), the SENSE pin is
the input to the error amplifier. Optimum regulation will be
obtained at the point where the SENSE pin is connected to
the OUT pin of the regulator. In critical applications, small
voltagedropsarecausedbytheresistance(RP)ofPCtraces
between the regulator and the load. These may be elimi-
nated by connecting the SENSE pin to the output at the
loadasshowninFigure1(KelvinSenseConnection). Note
that the voltage drop across the external PC traces will add
tothedropoutvoltageoftheregulator.TheSENSEpinbias
current is 600µA at the nominal rated output voltage. The
SENSEpincanbepulledbelowground(asinadualsupply
system where the regulator load is returned to a negative
supply) and still allow the device to start and operate.
IN: Input. Power is supplied to the device through the IN
pin. A bypass capacitor is required on this pin if the device
is more than six inches away from the main input filter
capacitor. In general, the output impedance of a battery
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor
in the range of 1µF to 10µF is sufficient. The LT1963 regu-
latorsaredesignedtowithstandreversevoltagesontheIN
pin with respect to ground and the OUT pin. In the case of
a reverse input, which can happen if a battery is plugged
in backwards, the device will act as if there is a diode in
series with its input. There will be no reverse current flow
into the regulator and no reverse voltage will appear at the
load. The device will protect both itself and the load.
ADJ: Adjust. For the adjustable LT1963, this is the input to
the error amplifier. This pin is internally clamped to ±7V.
It has a bias current of 3µA which flows into the pin. The
ADJ pin voltage is 1.21V referenced to ground and the
output voltage range is 1.21V to 20V.
IN
OUT
R
P
LT1963
+
+
SHDN SENSE
GND
LOAD
V
IN
R
P
1963 F01
SHDN:Shutdown.TheSHDNpinisusedtoputtheLT1963
regulators into a low power shutdown state. The output
Figure 1. Kelvin Sense Connection
1963fa
9
LT1963 Series
W U U
U
APPLICATIO S I FOR ATIO
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifications for output voltages greater than 1.21V will
beproportional to theratioofthe desiredoutput voltage to
1.21V: VOUT/1.21V. For example, load regulation for an
output current change of 1mA to 1.5A is –3mV typical at
VOUT = 1.21V. At VOUT = 5V, load regulation is:
The LT1963 series are 1.5A low dropout regulators opti-
mized for fast transient response. The devices are capable
of supplying 1.5A at a dropout voltage of 350mV. The low
operating quiescent current (1mA) drops to less than 1µA
in shutdown. In addition to the low quiescent current, the
LT1963regulatorsincorporateseveralprotectionfeatures
which make them ideal for use in battery-powered sys-
tems.Thedevicesareprotectedagainstbothreverseinput
and reverse output voltages. In battery backup applica-
tions where the output can be held up by a backup battery
when the input is pulled to ground, the LT1963-X acts like
it has a diode in series with its output and prevents reverse
current flow. Additionally, in dual supply applications
where the regulator load is returned to a negative supply,
the output can be pulled below ground by as much as 20V
and still allow the device to start and operate.
(5V/1.21V)(–3mV) = –12.4mV
Output Capacitance and Transient Response
The LT1963 regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small capaci-
tors. A minimum output capacitor of 10µF with an ESR in
the range of 50mΩ to 3Ω is recommended to prevent
oscillations. Larger values of output capacitance can de-
creasethepeakdeviationsandprovideimprovedtransient
response for larger load current changes. Bypass capaci-
tors, used to decouple individual components powered by
the LT1963, will increase the effective output capacitor
value.
Adjustable Operation
The adjustable version of the LT1963 has an output
voltage range of 1.21V to 20V. The output voltage is set by
theratiooftwoexternalresistorsasshowninFigure2.The
deviceservostheoutputtomaintainthevoltageatthe ADJ
pin at 1.21V referenced to ground. The current in R1 is
then equal to 1.21V/R1 and the current in R2 is the current
in R1 plus the ADJ pin bias current. The ADJ pin bias
current, 3µA at 25°C, flows through R2 into the ADJ pin.
The output voltage can be calculated using the formula in
Figure 2. The value of R1 should be less than 4.17k to
minimize errors in the output voltage caused by the ADJ
pinbiascurrent.Notethatinshutdowntheoutputisturned
off and the divider current will be zero.
Extra consideration must be given to the use of ceramic
capacitors. In some applications, the use of ceramic
capacitors with an ESR below 50mΩ can cause oscilla-
tions.PleaseconsultourApplicationsEngineeringdepart-
ment for help with any issues concerning the use of
ceramic output capacitors. Ceramic capacitors are manu-
factured with a variety of dielectrics, each with different
behavior over temperature and applied voltage. The most
commondielectricsusedareZ5U, Y5V, X5RandX7R. The
Z5U and Y5V dielectrics are good for providing high
capacitancesinasmallpackage,butexhibitstrongvoltage
and temperature coefficients as shown in Figures 3 and 4.
When used with a 5V regulator, a 10µF Y5V capacitor can
exhibit an effective value as low as 1µF to 2µF over the
operatingtemperaturerange.TheX5RandX7Rdielectrics
result in more stable characteristics and are more suitable
for use as the output capacitor. The X7R type has better
stability across temperature, while the X5R is less expen-
sive and is available in higher values.
IN
OUT
ADJ
V
OUT
+
V
LT1963
GND
R2
R1
IN
1963 F02
R2
R1
VOUT = 1.21V 1+
ADJ = 1.21V
ADJ = 3µA AT 25°C
OUTPUT RANGE = 1.21V TO 20V
+ I
R2
(
ADJ)(
)
V
I
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
1963fa
Figure 2. Adjustable Operation
10
LT1963 Series
W U U
U
APPLICATIO S I FOR ATIO
20
When power is first turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential is
small, allowing the regulator to supply large output
currents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1963-X.
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
0
X5R
–20
–40
–60
–80
–100
Y5V
0
8
12 14
2
4
6
10
16
DC BIAS VOLTAGE (V)
The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Com-
mon situations are immediately after the removal of a
short-circuit or when the shutdown pin is pulled high after
the input voltage has already been turned on. The load line
for such a load may intersect the output current curve at
two points. If this happens, there are two stable output
operating points for the regulator. With this double inter-
section, the input power supply may need to be cycled
down to zero and brought up again to make the output
recover.
1963 F03
Figure 3. Ceramic Capacitor DC Bias Characteristics
40
20
X5R
0
–20
–40
Y5V
–60
Output Voltage Noise
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
The LT1963 regulators have been designed to provide low
output voltage noise over the 10Hz to 100kHz bandwidth
while operating at full load. Output voltage noise is typi-
cally 40nV/√Hz over this frequency bandwidth for the
LT1963 (adjustable version). For higher output voltages
(generated by using a resistor divider), the output voltage
noise will be gained up accordingly. This results in RMS
noise over the 10Hz to 100kHz bandwidth of 14µVRMS for
the LT1963 increasing to 38µVRMS for the LT1963-3.3.
–100
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
1963 F04
Figure 4. Ceramic Capacitor Temperature Characteristics
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
Higher values of output voltage noise may be measured
when care is not exercised with regards to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1963-X. Power
supplyripplerejectionmustalsobeconsidered;theLT1963
regulators do not have unlimited power supply rejection
and will pass a small portion of the input noise through to
the output.
Overload Recovery
Like many IC power regulators, the LT1963-X has safe
operating area protection. The safe area protection de-
creases the current limit as input-to-output voltage in-
creases and keeps the power transistor inside a safe
operating region for all values of input-to-output voltage.
Theprotectionisdesignedtoprovidesomeoutputcurrent
at all values of input-to-output voltage up to the device
breakdown.
1963fa
11
LT1963 Series
W U U
U
APPLICATIO S I FOR ATIO
Table 2. SO-8 Package, 8-Lead SO
COPPER AREA
Thermal Considerations
THERMAL RESISTANCE
Thepowerhandlingcapabilityofthedeviceislimitedbythe
maximum rated junction temperature (125°C). The power
dissipated by the device is made up of two components:
BOARD AREA (JUNCTION-TO-AMBIENT)
TOPSIDE*
2500mm2
1000mm2
225mm2
BACKSIDE
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
2500mm2
55°C/W
55°C/W
63°C/W
69°C/W
1. Output current multiplied by the input/output voltage
differential: (IOUT)(VIN – VOUT), and
100mm2
*Device is mounted on topside.
2. GND pin current multiplied by the input voltage:
(IGND)(VIN).
Table 3. SOT-223 Package, 3-Lead SOT-223
COPPER AREA
TOPSIDE*
THERMAL RESISTANCE
BOARD AREA (JUNCTION-TO-AMBIENT)
The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteris-
tics. Power dissipation will be equal to the sum of the two
components listed above.
BACKSIDE
2500mm2
2500mm2
2500mm2
2500mm2
1000mm2
0mm2
2500mm2
1000mm2
225mm2
100mm2
1000mm2
1000mm2
2500mm2
2500mm2
2500mm2
2500mm2
1000mm2
1000mm2
42°C/W
42°C/W
50°C/W
56°C/W
49°C/W
52°C/W
The LT1963 series regulators have internal thermal lim-
iting designed to protect the device during overload
conditions. For continuous normal conditions, the maxi-
mum junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
all sources of thermal resistance from junction to ambi-
ent. Additional heat sources mounted nearby must also
be considered.
*Device is mounted on topside.
T Package, 5-Lead TO-220
Thermal Resistance (Junction-to-Case) = 4°C/W
Calculating Junction Temperature
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener-
ated by power devices.
Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.
IOUT(MAX)(VIN(MAX) – VOUT) + IGND(VIN(MAX)
where,
)
IOUT(MAX) = 500mA
VIN(MAX) = 6V
IGND at (IOUT = 500mA, VIN = 6V) = 10mA
Table 1. Q Package, 5-Lead DD
COPPER AREA
THERMAL RESISTANCE
BOARD AREA (JUNCTION-TO-AMBIENT)
TOPSIDE*
BACKSIDE
2500mm2
2500mm2
2500mm2
So,
2500mm2
1000mm2
125mm2
2500mm2
2500mm2
2500mm2
23°C/W
25°C/W
33°C/W
P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W
Using a DD package, the thermal resistance will be in the
range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:
*Device is mounted on topside
1.41W(28°C/W) = 39.5°C
1963fa
12
LT1963 Series
W U U
APPLICATIO S I FOR ATIO
U
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
fromthe1.21Vreferencewhentheoutputisforcedto20V.
The top resistor of the resistor divider must be chosen to
limitthecurrentintotheADJpintolessthan5mAwhenthe
ADJpinisat7V. The13VdifferencebetweenOUTandADJ
pinsdividedbythe5mAmaximumcurrentintotheADJpin
yields a minimum top resistor value of 2.6k.
T
JMAX = 50°C + 39.5°C = 89.5°C
Protection Features
The LT1963 regulators incorporate several protection
featureswhichmakethemidealforuseinbattery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage, or is left
open circuit. Current flow back into the output will follow
the curve shown in Figure 5.
Current limit protection and thermal overload protection
areintendedtoprotectthedeviceagainstcurrentoverload
conditions at the output of the device. For normal opera-
tion, the junction temperature should not exceed 125°C.
WhentheINpinoftheLT1963isforcedbelowtheOUTpin
ortheOUTpinispulledabovetheINpin, inputcurrentwill
typically drop to less than 2µA. This can happen if the
input of the device is connected to a discharged (low
voltage) battery and the output is held up by either a
backup battery or a second regulator circuit. The state of
the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.
The input of the device will withstand reverse voltages of
20V.Currentflowintothedevicewillbelimitedtolessthan
1mA (typically less than 100µA) and no negative voltage
will appear at the output. The device will protect both itself
and the load. This provides protection against batteries
that can be plugged in backward.
The output of the LT1963 can be pulled below ground
withoutdamagingthedevice.Iftheinputisleftopencircuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current flow
to typically less than 600µA. For adjustable versions, the
output will act like an open circuit; no current will flow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.
5.0
LT1963
= V
LT1963-1.8
= V
FB
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
V
OUT
OUT
ADJ
LT1963-2.5
= V
V
OUT
FB
LT1963-3.3
= V
V
OUT
FB
T
= 25°C
IN
J
V
= 0V
CURRENT FLOWS
INTO OUTPUT PIN
0
1
2
3
4
5
6
7
8
9
10
OUTPUT VOLTAGE (V)
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. Iftheinputisleftopencircuitorgrounded, theADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.
1963 F05
Figure 5. Reverse Output Current
1963fa
13
LT1963 Series
TYPICAL APPLICATIO S
U
SCR Pre-Regulator Provides Efficiency Over Line Variations
L1
500µH
LT1963-3.3
IN OUT
3.3V
1.5A
OUT
L2
1N4148
1k
+
+
10VAC AT
115V
SHDN
GND
FB
10000µF
22µF
IN
90-140
VAC
34k*
10VAC AT
115V
IN
1N4002
“SYNC”
1N4002
1N4002
12.1k*
+V
2.4k
C1A
TO ALL “+V”
POINTS
200k
+
1N4148
+
1/2
22µF
750Ω
LT1018
–
0.1µF
+V
C1B
+
750Ω
+V
A1
0.033µF
1/2
LT1018
+
–
1N4148
10k
–
LT1006
10k
10k
+V
1µF
+V
L1 = COILTRONICS CTX500-2-52
L2 = STANCOR P-8559
* = 1% FILM RESISTOR
= NTE5437
LT1004
1.2V
1963 TA03
U
PACKAGE DESCRIPTIO
Q Package
5-Lead Plastic DD Pak
(LTC DWG # 05-08-1461)
0.060
(1.524)
TYP
0.390 – 0.415
(9.906 – 10.541)
0.060
0.256
0.165 – 0.180
(4.191 – 4.572)
(1.524)
(6.502)
0.045 – 0.055
(1.143 – 1.397)
15° TYP
+0.008
0.004
–0.004
0.060
(1.524)
0.183
(4.648)
0.059
(1.499)
TYP
0.330 – 0.370
(8.382 – 9.398)
+0.203
–0.102
0.102
(
)
0.095 – 0.115
(2.413 – 2.921)
0.075
(1.905)
0.067
(1.70)
BSC
0.050 ± 0.012
(1.270 ± 0.305)
0.300
(7.620)
0.013 – 0.023
(0.330 – 0.584)
+0.012
0.143
–0.020
0.028 – 0.038
(0.711 – 0.965)
+0.305
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
3.632
Q(DD5) 1098
(
)
–0.508
1963fa
14
LT1963 Series
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
0.010 – 0.020
(0.254 – 0.508)
7
5
8
6
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0°– 8° TYP
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
0.016 – 0.050
(0.406 – 1.270)
0.050
(1.270)
BSC
0.014 – 0.019
(0.355 – 0.483)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1
2
3
4
SO8 1298
ST Package
3-Lead Plastic SOT-223
(LTC DWG # 05-08-1630)
0.248 – 0.264
(6.30 – 6.71)
0.114 – 0.124
(2.90 – 3.15)
10° – 16°
0.010 – 0.014
(0.25 – 0.36)
0.264 – 0.287
(6.70 – 7.30)
10°
MAX
0.071
(1.80)
MAX
0.130 – 0.146
(3.30 – 3.71)
10° – 16°
0.0008 – 0.0040
(0.0203 – 0.1016)
0.024 – 0.033
(0.60 – 0.84)
0.012
(0.31)
MIN
0.181
(4.60)
NOM
ST3 (SOT-233) 1298
0.033 – 0.041
(0.84 – 1.04)
0.0905
(2.30)
NOM
T Package
5-Lead Plastic TO-220 (Standard)
(LTC DWG # 05-08-1421)
0.165 – 0.180
(4.191 – 4.572)
0.147 – 0.155
(3.734 – 3.937)
DIA
0.390 – 0.415
(9.906 – 10.541)
0.045 – 0.055
(1.143 – 1.397)
0.230 – 0.270
(5.842 – 6.858)
0.570 – 0.620
(14.478 – 15.748)
0.620
(15.75)
TYP
0.460 – 0.500
(11.684 – 12.700)
0.330 – 0.370
(8.382 – 9.398)
0.700 – 0.728
(17.78 – 18.491)
0.095 – 0.115
(2.413 – 2.921)
SEATING PLANE
0.152 – 0.202
(3.861 – 5.131)
0.155 – 0.195*
(3.937 – 4.953)
0.260 – 0.320
(6.60 – 8.13)
0.013 – 0.023
(0.330 – 0.584)
0.067
BSC
0.135 – 0.165
(3.429 – 4.191)
0.028 – 0.038
(0.711 – 0.965)
(1.70)
* MEASURED AT THE SEATING PLANE
T5 (TO-220) 0399
1963fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LT1963 Series
U
TYPICAL APPLICATIO S
Adjustable Current Source
Paralleling of Regulators for Higher Output Current
R1
0.01Ω
LT1963-3.3
IN OUT
R5
3.3V
3A
C2
22µF
LT1963-1.8
IN OUT
0.01Ω
+
+
LOAD
C1
100µF
V
IN
> 3.7V
R1
+
C1
10µF
1k
SHDN
GND
FB
V
IN
> 2.7V
SHDN
GND
FB
LT1004-1.2
R4
R6
R8
100k
R2
80.6k
C3
1µF
2.2k 2.2k
R2
0.01Ω
LT1963
R3
2k
IN
OUT
R7
470Ω
R6
2
3
6.65k
8
+
–
SHDN
SHDN
FB
1
1/2
LT1366
GND
R7
4.12k
4
C2
3.3µF
NOTE: ADJUST R1 FOR
0A TO 1.5A CONSTANT CURRENT
1963 TA04
R3
2.2k
R4
2.2k
R5
1k
3
2
8
+
–
1
1/2
LT1366
C3
0.01µF
4
1963 TA05
RELATED PARTS
PART NUMBER
LT1120
DESCRIPTION
125mA Low Dropout Regulator with 20µA I
COMMENTS
Includes 2.5V Reference and Comparator
Q
LT1121
150mA Micropower Low Dropout Regulator
700mA Micropower Low Dropout Regulator
30µA I , SOT-223 Package
Q
LT1129
50µA Quiescent Current
LT1175
500mA Negative Low Dropout Micropower Regulator
300mA Low Dropout Micropower Regulator with Shutdown
3A Low Dropout Regulator with 50µA I
45µA I , 0.26V Dropout Voltage, SOT-223 Package
Q
LT1521
15µA I , Reverse Battery Protection
Q
LT1529
500mV Dropout Voltage
Q
LT1772
Constant Frequency, Current Mode Step-Down DC/DC Controller
High Efficiency Synchronous Step-Down Switching Regulator
Up to 94% Efficiency, SOT-23 Package, 100% Duty Cycle
Burst ModeTM Operation, Monolithic, 100% Duty Cycle
LTC1627
LT1761 Series
LT1762 Series
LT1763 Series
LT1764 Series
LT1962 Series
100mA, Low Noise, Low Dropout Micropower Regulators in SOT-23 20µA Quiescent Current, 20µV
Noise, SOT-23 Package
Noise, MSOP Package
Noise, SO-8 Package
Noise
RMS
RMS
RMS
150mA, Low Noise, LDO Micropower Regulators
500mA, Low Noise, LDO Micropower Regulators
3A, Fast Transient Response Low Dropout Regulator
300mA, Low Noise, LDO Micropower Regulator
25µA Quiescent Current, 20µV
30µA Quiescent Current, 20µV
340mV Dropout Voltage, 40µV
RMS
RMS
30µA Quiescent Current, 20µV
Noise, MSOP Package
Burst Mode is a trademark of Linear Technology Corporation.
1963fa
LT/TP 0602 1.5K REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
LINEAR TECHNOLOGY CORPORATION 2000
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